static pme_sparc_entry_t niagara1_pe[] = {
	/* PIC1 Niagara-1 events */
	{	.pme_name = "Instr_cnt",
		.pme_desc = "Number of instructions completed",
		.pme_ctrl = PME_CTRL_S1,
		.pme_val = 0x0,
	},

	/* PIC0 Niagara-1 events */
	{	.pme_name = "SB_full",
		.pme_desc = "Store-buffer full",
		.pme_ctrl = PME_CTRL_S0,
		.pme_val = 0x0,
	},
	{	.pme_name = "FP_instr_cnt",
		.pme_desc = "FPU instructions",
		.pme_ctrl = PME_CTRL_S0,
		.pme_val = 0x1,
	},
	{	.pme_name = "IC_miss",
		.pme_desc = "I-cache miss",
		.pme_ctrl = PME_CTRL_S0,
		.pme_val = 0x2,
	},
	{	.pme_name = "DC_miss",
		.pme_desc = "D-cache miss",
		.pme_ctrl = PME_CTRL_S0,
		.pme_val = 0x3,
	},
	{	.pme_name = "ITLB_miss",
		.pme_desc = "I-TLB miss",
		.pme_ctrl = PME_CTRL_S0,
		.pme_val = 0x4,
	},
	{	.pme_name = "DTLB_miss",
		.pme_desc = "D-TLB miss",
		.pme_ctrl = PME_CTRL_S0,
		.pme_val = 0x5,
	},
	{	.pme_name = "L2_imiss",
		.pme_desc = "E-cache instruction fetch miss",
		.pme_ctrl = PME_CTRL_S0,
		.pme_val = 0x6,
	},
	{	.pme_name = "L2_dmiss_ld",
		.pme_desc = "E-cache data load miss",
		.pme_ctrl = PME_CTRL_S0,
		.pme_val = 0x7,
	},

};
#define PME_NIAGARA1_EVENT_COUNT	   (sizeof(niagara1_pe)/sizeof(pme_sparc_entry_t))
